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Audio Processor IC
PT2319
DESCRIPTION
PT2319 is an audio processor IC specially designed for high fidelity audio applications utilizing advanced CMOS processing technology. Included in the IC are 5 stereo input signal ports, super bass and bass/treble controls, volume control, balance/fader controls and muting. The internal circuits of PT2319 have undergone meticulous adjustment to achieve the finest possible audio quality. Extremely low signal distortion, strong signal driving ability, and clear dynamic peak and level sound quality at any volume level distinguish PT2319 from other audio processors. PT2319 is the ideal solution for audio systems catering to the most demanding audiophiles.
FEATURES
CMOS process technology Low level output signal loss: Typ.=0.003% at VOUT=1Vrms High level output driving ability: load impedance as low as 600 Large output amplitude Five stereo input signal ports Volume, balance and fader controls Super bass, bass and treble controls Select Out supports addition of externals circuits Built-in automatic power-on reset 3-wire digital control interface 36-pin SSOP packaging
APPLICATIONS
High fidelity audio systems Car audio systems
PT2319 V1.4
-1-
December, 2005
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Audio Processor IC
PT2319
VDD
BLOCK DIAGRAM
VSS CE CL DI
LROUT LFOUT Output Gain & Fader Output Gain & Fader
RROUT RFOUT
LFIN Super Bass Super Bass LOUT LSB LBASS2 LBASS1
RFIN ROUT RSB RBASS2 RBASS1
Bass
Control Interface
Control Circuit
Control Circuit
Control Circuit
Treble
RvREF
LVref
LTRE
Treble
Bass
RTRE
LIN Input Gain
+
+
RIN Input Gain
LSELO
RSELO
Input SEL.
Input SEL. L2 L1 Vref R1 R2 R3 R4
L5
L4
L3
R5
PT2319 V1.4
-2-
December, 2005
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Audio Processor IC
PT2319
PIN CONFIGURATION
DI CE VS S LROUT LFOUT LFIN LOUT LSB LBAS S2 LBAS S1 LTRE LIN LSELO L5 L4 L3 L2 L1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 CL VDD RROUT RF OUT RF IN ROUT RSB RBA SS 2 RBA SS 1 RTR E RIN RSE LO R5 R4 R3 R2 R1 Vref
P T 23 1 9
PT2319 V1.4
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December, 2005
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Audio Processor IC
PT2319
PIN DESCRIPTION
Pin No. 1 2 3 4 5 7 8 9 10 11 13 14 15 16 17 18 19 20 21 22 23 24 25 27 28 29 30 31 33 34 35 36 Pin Name DI CE VSS LROUT LFOUT LOUT LSB LBASS2 LBASS1 LTRE LSELO L5 L4 L3 L2 L1 Vref R1 R2 R3 R4 R5 RSELO RTRE RBASS1 RBASS2 RSB ROUT RFOUT RROUT VDD CL Function 3-wire serial data pin 3-wire chip enable pin Ground pin Left rear channel output pin Left front channel output pin Left super bass output and external component connection pin Left super bass external component connection pin Left bass filter external component connection pin 2 Left bass filter external component connection pin 1 Capacitor connection pin for configuring treble filter (left) Input selector output pin (left) Input signal pin 5 (left) Input signal pin 4 (left) Input signal pin 3 (left) Input signal pin 2 (left) Input signal pin 1 (left) Reference voltage bypass capacitor Input signal pin 1 (right) Input signal pin 2 (right) Input signal pin 3 (right) Input signal pin 4 (right) Input signal pin 5 (right) Input selector output pin (right) Capacitor connection pin for configuring treble filter (right) Right bass filter external component connection pin 1 Right bass filter external component connection pin 2 Right super bass external component connection pin Right super bass output and external component connection pin Right front channel output pin Right rear channel output pin Power supply pin 3-wire serial clock input pins
PT2319 V1.4
-4-
December, 2005
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Audio Processor IC
PT2319
FUNCTION DESCRIPTION
CONTROLLER FUNCTIONS
Function Volume Control Scope 81-step gain control Range 0dB to -79dB Step 81 is - Step Each step 1dB Other Left and right channel gain can be adjusted independently as a balance control.
Output Total of 16 0dB to -60dB and Fader steps Step 16 is - Bass control Treble control Super bass Input selector gain Output gain Input signal selector Total 15 steps Total 15 steps Total 11 steps Total 16 steps Total 3 steps Total 5 inputs 11.9dB 11.9dB 0dB to +20dB 0dB to +18.75dB 0dB, +6.5dB, +8.5dB
0dB to -20dB: 2dB steps -20dB to -25dB: 5dB steps Can select attenuation for either -25dB to -45dB: 10dB steps the front or rear channels. Then -60dB and - Each step 1.9dB Each step 1.9dB Each step 2dB Each step 1.25dB Super bass gain boost only
Stereo inputs
PT2319 V1.4
-5-
December, 2005
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Audio Processor IC
PT2319
3-WIRE SERIAL BUS INTERFACE
To control any of PT2319's functions, it is necessary to pass the microprocessor control signals through the CE, DI, and CL 3-wire interface. The basic timing sequence of the control codes is shown in the diagram below.
CE DI CL CE
1 s min 1 s 1 s 1 s min min min 1 s min
B0 B1 B2 B3 A0 A1 A2 A3 D0 D1 D2 D3 D4 D5 D 38 D 39 D 40 D 41 D 42 D 43
CL DI
1 s T
INTERFACE PROTOCOL
The 52-bit control code for PT2319 is composed of an 8-bit address code and a 44-bit data code for a total control code length of 52 bits.
CONTROL CODE DEFINITIONS
Function Name Fader Super Bass Bass Treble Volume Input Gain Input Selector Fader Front/Rear Sel. Output Gain Balance Input Mute Test Mode Application Adjust fader gain Super bass boost Bass adjustment Treble adjustment Main volume control Input selector gain Input selector Fader channel selector Output gain select Left/right channel select For muting For factory testing Register Location D0 ~ D3 D4 ~ D7 D8 ~ D11 D12 ~ D15 D16 ~ D23 D24 ~ D27 D28, D29, D32 D30 D31, D39 D33, D34 D35 D36 ~ D38, D40 ~ D43 Send all zeroes under normal operation Operates in conjunction with volume Notes Only boost Can independently adjust left and right volumes
PT2319 V1.4
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December, 2005
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Audio Processor IC
PT2319
CONTROL CODE BIT DIAGRAM
BBBBAAAA 01230123
10000001 Ad d re ss co d e DDDDDDD DDDD DDDDDD DDD D DDDDDDD DDD DDDDDD DDDD DDD 0 1 2 3 4 5 6 7 8 9 1 0 11 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 3 1 3 2 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 4 1 4 2 4 3 Vo lu m e co n t ro l F a d e r st e p co n tro l 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 - d B -6 0 d B -4 5 d B -3 5 d B -2 5 d B -2 0 d B -1 8 d B -1 6 d B -1 4 d B -1 2 d B -1 0 d B -8 d B -6 d B -4 d B -2 d B 0dB Ba ss co n t ro l Bo o st 1 1 1 0 ST E P1 5 0 1 1 0 ST E P1 4 1 0 1 0 ST E P1 3 0 0 1 0 ST E P1 2 1 1 0 0 ST E P11 0 1 0 0 ST E P1 0 1 0 0 0 ST E P9 0 0 0 0 ST E P8 1 0 0 1 ST E P7 0 1 0 1 ST E P6 1 1 0 1 ST E P5 0 0 1 1 ST E P4 1 0 1 1 ST E P3 0 1 1 1 ST E P2 1 1 1 1 ST E P1 Cut
In p u t sw i tc h co n t ro l (1 ) In p u t sw i tc h co n t ro l (2 ) T ES T m ode In p u t mu t e sw it ch co n t ro l 0 OFF 1 ON
Fader re sr /fro n t co n t ro l 0 Rear 1 F ro n t In p u t g a in c o n tro l 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0dB +1 . 2 5 d B +2 . 5 0 d B +3 . 7 5 d B +5 . 0 0 d B +6 . 2 5 d B +7 . 5 0 d B +8 . 7 5 d B +1 0 . 0 0 d B +11 . 2 5 d B +1 2 . 5 0 d B +1 3 . 7 5 d B +1 5 . 0 0 d B +1 6 . 2 5 d B +1 7 . 5 0 d B +1 8 . 7 5 d B
Channel se l e ct io n 0 1 0 1 0 0 1 1
In i ti a l se tt in g L ch Rc h L /R sim u l ta n e o u s
Su p e r b a ss co n tro l 0 1 0 1 0 1 0 1 0 1 0 0 0 1 1 0 0 1 1 0 0 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 ST E P 0 (F L AT ) ST E P 1 ST E P 2 ST E P 3 ST E P 4 ST E P 5 ST E P 6 ST E P 7 ST E P 8 ST E P 9 ST E P 1 0 (B O OS T m a x)
Tre b l e co n t ro l Bo o st 1 1 1 0 ST E P1 5 0 1 1 0 ST E P1 4 1 0 1 0 ST E P1 3 0 0 1 0 ST E P1 2 1 1 0 0 ST E P11 0 1 0 0 ST E P1 0 1 0 0 0 ST E P9 0 0 0 0 ST E P8 1 0 0 1 ST E P7 0 1 0 1 ST E P6 1 1 0 1 ST E P5 0 0 1 1 ST E P4 1 0 1 1 ST E P3 0 1 1 1 ST E P2 1 1 1 1 ST E P1 Cut
O u tp u t g a in c o n tro l 0 0 1 1 0dB 0 1 0dB 0 +6 . 5 d B 1 +8 . 5 d B
PT2319 V1.4
-7-
December, 2005
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Audio Processor IC
PT2319
D18 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 D19 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 D20 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1
-8-
VOLUME CONTROL CODE DEFINITIONS
D16 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
PT2319 V1.4
D17 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
D21 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0
D22 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D23 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Operation 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB
December, 2005
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Audio Processor IC
D16 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D17 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 D18 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 D19 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 D20 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 D21 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 D22 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 D23 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Operation -42dB -43dB -44dB -45dB -46dB -47dB -48dB -49dB -50dB -51dB -52dB -53dB -54dB -55dB -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -dB
PT2319
PT2319 V1.4
-9-
December, 2005
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Audio Processor IC
PT2319
D28 D29 D32 Operation 0 0 1 L1 (R1) ON 1 0 1 L2 (R2) ON 0 1 1 L3 (R3) ON 1 1 1 L4 (R4) ON 0 0 0 L5 (R5) ON
INPUT SELECTOR DEFINITIONS
IMPORTANT USER NOTES
SOFTWARE PROGRAMMING NOTES
Notes: 1. Internal registers are not in a set condition when the IC is powered on. To ensure that unusual noise will not be output, it is suggested that an external muting circuit is added before the control codes are sent. 2. After the IC has been powered on, send the IC a "clear register" code (to clear the register: D33 = D34 = 0) followed by initialization values for each register in order. 3. PT2319 control codes constitute a 52-bit signal. Each time a control code is sent, all data in the registry must be written into. When it is necessary to access only one function (for example, volume control only), it is allowed to change only the corresponding register data (in this example, D16 to D23) while the remaining registers are sent original unchanged data.
CIRCUIT LAYOUT NOTES
Notes: 1. To ensure that the 3-wire bus line signals (DI, CL, CE) do not interfere with the audio signals, when designing the circuit layout: 1) place the bus line at a sufficient distance from the audio path, and 2) the bus line and audio path should not be parallel. In addition to this, use a shielded ground pane or use a shielded cable to deliver signals to the interface. 2. To minimize interference between different voltage levels, please ensure that analog and digital grounds are separate. Analog grounds such as PT2319 GND and output terminal grounds should be connected together. The display shield, MCU, key scanning signal and remote control receiver decoder should be connected to a separate ground path. Finally, connect the two grounds at the power supply GND point.
PT2319 V1.4
- 10 -
December, 2005
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Audio Processor IC
PT2319
ABSOLUTE MAXIMUM RATINGS
Parameter Supply voltage Max. input voltage Operating temperature Storage temperature Symbol Vcc VIMAX Topr Tstg Condition CL,DI,CE Other than CL,DI,CE Min. 0 -0.3 Vss - 0.3 -40 -65 Max. 11 11 VDD + 0.3 +85 +150 Unit V V
PT2319 V1.4
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December, 2005
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Audio Processor IC
PT2319
ELECTRICAL CHARACTERISTICS
(Vcc=9V, Rs=600, RL=10K, f=1KHz, Ta=25, Volume, treble and bass=0dB) Parameter Symbol Condition Min. Typ. Max. Supply voltage Vcc 5 9 10 VDD=5V, No Load 11 16 Supply current Ic VDD=9V, No Load 15 20 Vi=1Vrms 0.003 0.01 Input Selector Vi=0.2Vrms 0.005 0.01 Total harmonic Vi=1Vrms 0.003 0.01 THD Volume Control distortion Vi=0.2Vrms 0.005 0.01 Vi=1Vrms 0.003 0.01 Fader Vi=0.2Vrms 0.005 0.01 Left and Right CTLR 100 110 120 channel separation Input selector CTIN 90 95 crosstalk Noise output Noise A-weighted 8 12 Signal to noise ratio S/N A-weighted 98 100 Mute level Mute Vin=1Vrms 100 F=100Hz, Vr=0.1V 60 65 Ripple reduction PSRR F=1KHz, Vr=0.1V 80 85 Select Input 35 50 65 Input resistance RIN Volume Control, Fader Input 30 40 50 Select Output, Volume Output, Output resistance ROUT 15 Fader Output Recommended lowest impedance RLOAD 600 load Maximum output VOMAX THD=1% 2.7 2.9 3.0 voltage Slew rate Slew Rate 4 Audio signal ABW -3dB, HF 550 Bandwidth 3-Wire Serial Bus Interface Input high level VIH CL, CE, DI 3.0 VDD Input low level VIL CL, CE, DI Vss 1.0 Pulse width Tw CL 1 Settle time Tsetup CL, CE, DI 1 Hold time Thold CL, CE, DI 1 Input clock Tclk CL, CE, DI 500 Unit V mA
%
dB dB V dB dB dB K Vrms V/s KHz V V s s s KHz
PT2319 V1.4
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December, 2005
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Audio Processor IC
PT2319
GAIN ADJUSTMENT SCOPE
Parameter Super Bass Control Maximum boost Step adjustment Bass Control Maximum boost Maximum attenuation Step adjustment Treble Control Maximum boost Maximum attenuation Step adjustment Input Gain Control Minimum gain Maximum gain Step adjustment Volume Control Minimum attenuation Maximum attenuation Step adjustment Fader Attenuator Minimum attenuation Maximum attenuation Step adjustment Output Gain Minimum gain Step adjustment Symbol Gsbass Gsbstep Gbass Gbass Gbstep Gtreble Gtreble Gtstep INgain INgain INstep VOLgain VOLgain VOLstep FADgain FADgain FADstep Condition Step 0 Step 15 Step 80 Step 1 Step 0 Step 15 Step 1 Step 0 0 ~ -20dB -20 ~ -25dB -25 ~ -45dB -45 ~ -60dB Step 0 Step 1 Step 2 Step 3 Min. +9 -9 1 +9 -9 Typ. +20 2 +11.9 -11.9 1.7 +11.9 -11.9 1.7 0 +18.75 +1.25 0 -79 - 1 0 -60 - 2 5 10 15 0 0 +6.5 +8.5 Max. +14 -14 3 +14 -14 Unit dB
dB
dB
dB
dB
dB
dB
OUTgain OUTstep
dB
PT2319 V1.4
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December, 2005
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Audio Processor IC
PT2319
ELECTRICAL CHARACTERISTIC DIAGRAMS
Total Harmonic Distortion and Amplitude
1Vrms Output FFT Analysis
Left and Right Channel Crosstalk
PT2319 V1.4
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December, 2005
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Audio Processor IC
PT2319
APPLICATION CIRCUIT
1
COM
DI CE VSS LROUT LFOUT LFIN LOUT LSB LBASS2 LBASS1 LTRE LIN LSELO L5 L4 L3 L2 L1
CL 36 VDD 35 RROUT 34
+
VDD
2 3
2.2 F
PA
2.2 F
PA
+ +
4 5 6 7 8 9 10 11 12 13
RFOUT 33 + RFIN 32 ROUT 31 RSB 30 RBASS2 29
2.2 F
PA
2.2 F
PA
+1 F
0.15 F 0.15 F
3.7K
1F
3.7K
+
0.15 F 0.15 F
LSB
0.082 F
0.082 F
7.68K
7.68K
0.082 F
0.082 F LSB 1500pF
PT2319
RBASS1 28 RTRE 27 RIN 26 RSELO 25 R5 24 R4 23 R3 22 R2 21 R1 20 Vref 19
1500pF
+
1 F
1F
1 F
+
1 F
+ + + + + +
+ + + + +
1 F
14 15 16 17 18
1 F
1 F
1 F
1 F
1 F
1 F
1 F
2.2 F
PT2319 V1.4
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December, 2005
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Audio Processor IC
PT2319
ORDER INFORMATION
Valid Part Number PT2319 Package Type 36 Pins, SSOP, 300mil Top Code PT2319
PT2319 V1.4
- 16 -
December, 2005
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Audio Processor IC
PT2319
PACKAGE INFORMATION
36 PINS, SSOP, 300 MIL
C
GAUGE PLANE
C
0.01 INCH
L
E1 E D A
0.004 C
Symbol
A A1 b c e E E1 h L D
Min 0.095 0.008 0.012 0.005
0.395 0.291 0.015 0.020 0 0.620
Dimensions In Inches Typ 0.102 0.012
0.032 Basic 0.295
A1
SEATING PLANE
e
b
h x 45
Max 0.110 0.016 0.018 0.010
0.420 0.299 0.025 0.040 8 0.630
0.625
Notes: 1. Dimension "D" does not include mold flash, protrusions, or gate burrs. 2. Mold flash, protrusions, and gate burrs shall not exceed 0.006 inch. (0.1524mm) per side. 3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, and gate burrs shall not exceed 0.15 mm (0.006 in) per side.
PT2319 V1.4
- 17 -
December, 2005

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